臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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	2019臺灣學術機構典藏研討會
	機構典藏系統RC7版本已發佈

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Institution	Date	Title	Author
義守大學	2016-07	Multi-grating sections of dielectric waveguides	Nai-Hsiang Sun;Ming-Yu Tsai;Tsum-Yen He;Jung-Sheng Chiang;Gary A. Evans;Jerome K. Butler
義守大學	2015-09	Space harmonic distribution at Bragg condition in periodical dielectric waveguides	Nai-Hsiang Sun;Yu-Wei Liu;Ming-Yu Tsai;Li-Ti Kung;Jung-Sheng Chiang
中原大學	2014-06-24	Six Sigma之實務應用方法研究—以增光片生產為例	蔡明諭; Ming-Yu Tsai
亞洲大學	2011	The Exploration of Oral Health Behaviors and Dental Care Utilization in Taiwan	Ming-Yu Tsai
國立中山大學	2008-05	Area-Oriented Pass-Transistor Logic Synthesis Using Buffer Elimination and Layout Compaction	Shen-Fu Hsiao; Ming-Yu Tsai; Chia-Sheng Wen
國立中山大學	2008-04	Transistor Sizing and Layout Merging of Basic in Pass Transistor Logic Cell Library	Shen-Fu Hsiao; Ming-Yu Tsai; Chia-Sheng Wen
國立中山大學	2007-08	Multple-Input XOR/XNOR Circuit Design Using Pass-Transistor Logic and Its Application in Cryptography	Ming-Yu Tsai; Chia-Sheng Wen; Shen-Fu Hsiao
中山醫學大學	2007	針灸後嚴重雙側性氣胸：個案報告及文獻回顧	葉兆斌;周明智;蔡銘祐;邱永偉;林怡芬; Chao-Bin Yeh;Ming-Chih Chou;Ming-Yu Tsai;Yuan-Wei Chiu;Yi-Fen Lin
國立中山大學	2006-12	An Automatic Cache Generator Based on Content-Addressable Memory	Shen-Fu Hsiao; Sze-Yun Lin; Tze-Chorng Cheng; Ming-Yu Tsai
國立中山大學	2006-12	Efficient Pass-Transistor-Logic Synthesis for Sequential Circuits	Shen-Fu Hsiao; Ming-Yu Tsai; Chia-Sheng Wen
國立中山大學	2006-08	Novel Memory Organization and Circuit Designs for Efficient Data Access in Applications of 3D Graphics and Multimedia Coding	Shen-Fu Hsiao; Yo-Chi Chen; Ming-Yu Tsai; Tze-Chong Cheng
國立中山大學	2005-5	An Efficient Pass-Transistor-Logic Synthesizer Using Multiplexers and Inverters Only	Shen-Fu Hsiao; Ming-Yu Tsai; Ming-Chih Chen; Chia-Sheng Wen
國立中山大學	2005-10	System-on-Chip Implementation of the Whole Advanced Encryption Standard (AES) Processor Using Reduced XOR-based Sum-of-Product Operations	Shen-Fu Hsiao;Ming-Chih Chen;Ming-Yu Tsai;Chi-Chen Lin
國立中山大學	2005-07	A Cell-Driven Multiplier Generator with Delay Optimization of Partial Products Compression and an Efficient Partition Technique for the Final Addition	Tso-Bing Juang;Shen-Fu Hsiao;Ming-Yu Tsai;Jeng-Hsiung Jan
國立中山大學	2004-12	Low-error Carry-Free Fixed-Width Multipliers and Their Application to DCT/IDCT	Tso-Bing Juang; Shen-Fu Hsiao; Shiann-Rong Kuang; Ming-Yu Tsai
國立中山大學	2004-08	Para-CORDIC: Parallel CORDIC Rotation Algorithm	Tso-Bing Juang;Shen-Fu Hsiao;Ming-Yu Tsai
國立中山大學	2003-12	Design of Fixed-Length Multipliers Using Radix-2 Signed-Digit Redundant Numbers	Tso-Bing Juang; Shen-Fu Hsiao; Ming-Yu Tsai
國立中山大學	2003-08	Architectural Optimization for the forward and Inverse MixColumn Operations in Rijndael AES	Ming-Chih Chen; Shen-Fu Hsiao; Ming-Yu Tsai
國立中山大學	2002-12	Partitioning Methodology of the Final Adder in a Tree Structure Parallel Multiplier Generator	Tso-Bing Juang; Jeng-Hsin Jan; Ming-Yu Tsai; Shen-Fu Hsiao
國立中山大學	2002-08	High-Performance Logic Synthesis Based on Pass-Transistor Logic	Ming-Yu Tsai; Chia-Sheng Wen; Shen-Fu Hsiao
國立中山大學	2002-08	A High-Performance Function Generator for Multiplier-Based Arithmetic Operations	Tso-Bing Juang; Jeng-Hsin Jan; Ming-Yu Tsai; Shen-Fu Hsiao
國立中山大學	2001-08	Novel High-Performance and Area-Efficient D-Flip-Flop Circuits	Ming-Yu Tsai; Tso-Bing Juang; Shen-Fu Hsiao
國立中山大學	2001-08	A Multiplier-Based Arithmetic Function Generator for Digital Signal Processing Applications	Shen-Fu Hsiao; Tso-Bing Juang; Jeng Hsium Jan; Ming Yu Tsai

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